Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology

L. Cecconi; F. Piro; J. L.A. de Melo; W. Deng; G. H. Hong; W. Snoeys; M. Mager; M. Suljic; T. Kugathasan; M. Buckland; G. Aglieri Rinella; P. V. Leitao; F. Reidt; J. Baudot; S. Bugiel; C. Colledani; G. Contin; C. Hu; A. Kluge; R. Kluit; A. Vitkovskiy; R. Russo; P. Becht; A. Grelli; J. Hasenbichler; M. Munker; H. K. Soltveit; M. W. Menzel; J. Sonneveld; N. Tiltmann

doi:10.1088/1748-0221/18/02/C02025

Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology

L. Cecconi^*, F. Piro, J. L.A. de Melo, W. Deng, G. H. Hong, W. Snoeys, M. Mager, M. Suljic, T. Kugathasan, M. Buckland, G. Aglieri Rinella, P. V. Leitao, F. Reidt, J. Baudot, S. Bugiel, C. Colledani, G. Contin, C. Hu, A. Kluge, R. KluitA. Vitkovskiy, R. Russo, P. Becht, A. Grelli, J. Hasenbichler, M. Munker, H. K. Soltveit, M. W. Menzel, J. Sonneveld, N. Tiltmann

^*Corresponding author for this work

Research output: Contribution to journal › Article › Academic › peer-review

Abstract

The Digital Pixel Test Structure (DPTS) is a monolithic active pixel sensor prototype chip designed to explore the TPSCo 65 nm ISC process in the framework of the CERN-EP R&D on monolithic sensors and the ALICE ITS3 upgrade. It features a 32 × 32 binary pixel matrix at 15 μm pitch with event-driven readout, with GHz range time-encoded digital signals including Time-Over-Threshold. The chip proved fully functional and efficient in testbeam allowing early verification of the complete sensor to readout chain. This paper focuses on the design, in particular the digital readout and its perspectives with some supporting results.

Original language	English
Article number	C02025
Number of pages	10
Journal	Journal of Instrumentation
Volume	18
Issue number	2
DOIs	https://doi.org/10.1088/1748-0221/18/02/C02025
Publication status	Published - 1 Feb 2023

Bibliographical note

Publisher Copyright:
© 2023 IOP Publishing Ltd and Sissa Medialab.

Keywords

Electronic detector readout concepts (solid-state)
Particle tracking detectors (Solid-state detectors)
Solid state detectors

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Cecconi, L., Piro, F., de Melo, J. L. A., Deng, W., Hong, G. H., Snoeys, W., Mager, M., Suljic, M., Kugathasan, T., Buckland, M., Aglieri Rinella, G., Leitao, P. V., Reidt, F., Baudot, J., Bugiel, S., Colledani, C., Contin, G., Hu, C., Kluge, A., ... Tiltmann, N. (2023). Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology. Journal of Instrumentation, 18(2), Article C02025. https://doi.org/10.1088/1748-0221/18/02/C02025

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title = "Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology",

abstract = "The Digital Pixel Test Structure (DPTS) is a monolithic active pixel sensor prototype chip designed to explore the TPSCo 65 nm ISC process in the framework of the CERN-EP R&D on monolithic sensors and the ALICE ITS3 upgrade. It features a 32 × 32 binary pixel matrix at 15 μm pitch with event-driven readout, with GHz range time-encoded digital signals including Time-Over-Threshold. The chip proved fully functional and efficient in testbeam allowing early verification of the complete sensor to readout chain. This paper focuses on the design, in particular the digital readout and its perspectives with some supporting results.",

keywords = "Electronic detector readout concepts (solid-state), Particle tracking detectors (Solid-state detectors), Solid state detectors",

author = "L. Cecconi and F. Piro and {de Melo}, {J. L.A.} and W. Deng and Hong, {G. H.} and W. Snoeys and M. Mager and M. Suljic and T. Kugathasan and M. Buckland and {Aglieri Rinella}, G. and Leitao, {P. V.} and F. Reidt and J. Baudot and S. Bugiel and C. Colledani and G. Contin and C. Hu and A. Kluge and R. Kluit and A. Vitkovskiy and R. Russo and P. Becht and A. Grelli and J. Hasenbichler and M. Munker and Soltveit, {H. K.} and Menzel, {M. W.} and J. Sonneveld and N. Tiltmann",

note = "Publisher Copyright: {\textcopyright} 2023 IOP Publishing Ltd and Sissa Medialab.",

year = "2023",

month = feb,

day = "1",

doi = "10.1088/1748-0221/18/02/C02025",

language = "English",

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Cecconi, L, Piro, F, de Melo, JLA, Deng, W, Hong, GH, Snoeys, W, Mager, M, Suljic, M, Kugathasan, T, Buckland, M, Aglieri Rinella, G, Leitao, PV, Reidt, F, Baudot, J, Bugiel, S, Colledani, C, Contin, G, Hu, C, Kluge, A, Kluit, R, Vitkovskiy, A, Russo, R, Becht, P, Grelli, A, Hasenbichler, J, Munker, M, Soltveit, HK, Menzel, MW, Sonneveld, J & Tiltmann, N 2023, 'Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology', Journal of Instrumentation, vol. 18, no. 2, C02025. https://doi.org/10.1088/1748-0221/18/02/C02025

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T1 - Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology

AU - Cecconi, L.

AU - Piro, F.

AU - de Melo, J. L.A.

AU - Deng, W.

AU - Hong, G. H.

AU - Snoeys, W.

AU - Mager, M.

AU - Suljic, M.

AU - Kugathasan, T.

AU - Buckland, M.

AU - Aglieri Rinella, G.

AU - Leitao, P. V.

AU - Reidt, F.

AU - Baudot, J.

AU - Bugiel, S.

AU - Colledani, C.

AU - Contin, G.

AU - Hu, C.

AU - Kluge, A.

AU - Kluit, R.

AU - Vitkovskiy, A.

AU - Russo, R.

AU - Becht, P.

AU - Grelli, A.

AU - Hasenbichler, J.

AU - Munker, M.

AU - Soltveit, H. K.

AU - Menzel, M. W.

AU - Sonneveld, J.

AU - Tiltmann, N.

PY - 2023/2/1

Y1 - 2023/2/1

N2 - The Digital Pixel Test Structure (DPTS) is a monolithic active pixel sensor prototype chip designed to explore the TPSCo 65 nm ISC process in the framework of the CERN-EP R&D on monolithic sensors and the ALICE ITS3 upgrade. It features a 32 × 32 binary pixel matrix at 15 μm pitch with event-driven readout, with GHz range time-encoded digital signals including Time-Over-Threshold. The chip proved fully functional and efficient in testbeam allowing early verification of the complete sensor to readout chain. This paper focuses on the design, in particular the digital readout and its perspectives with some supporting results.

AB - The Digital Pixel Test Structure (DPTS) is a monolithic active pixel sensor prototype chip designed to explore the TPSCo 65 nm ISC process in the framework of the CERN-EP R&D on monolithic sensors and the ALICE ITS3 upgrade. It features a 32 × 32 binary pixel matrix at 15 μm pitch with event-driven readout, with GHz range time-encoded digital signals including Time-Over-Threshold. The chip proved fully functional and efficient in testbeam allowing early verification of the complete sensor to readout chain. This paper focuses on the design, in particular the digital readout and its perspectives with some supporting results.

KW - Electronic detector readout concepts (solid-state)

KW - Particle tracking detectors (Solid-state detectors)

KW - Solid state detectors

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U2 - 10.1088/1748-0221/18/02/C02025

DO - 10.1088/1748-0221/18/02/C02025

M3 - Article

AN - SCOPUS:85147924027

SN - 1748-0221

VL - 18

JO - Journal of Instrumentation

JF - Journal of Instrumentation

IS - 2

M1 - C02025

ER -

Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology

Abstract

Bibliographical note

Keywords

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